?001 fairchild semiconductor corporation 2N6796 rev. b 2N6796 8a, 100v, 0.180 ohm, n-channel power mosfet the 2N6796 is an n-channel enhancement mode silicon gate power ?ld effect transistor designed for applications such as switching regulators, switching converters, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. this type can be operated directly from integrated circuits. features 8a, 100v ? ds(on) = 0.180 ? soa is power dissipation limited nanosecond switching speeds linear transfer characteristics high input impedance majority carrier device related literature - tb334 ?uidelines for soldering surface mount components to pc boards symbol packaging jedec to-205af ordering information part number package brand 2N6796 to-205af 2N6796 note: when ordering, use the entire part number. g d s source drain (case) gate data sheet december 2001
?001 fairchild semiconductor corporation 2N6796 rev. b absolute maximum ratings t c = 25 o c, unless otherwise speci?d 2N6796 units drain to source breakdown voltage (note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v ds 100 v drain to gate voltage (r gs = 20k ?) (note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .v dgr 100 v continuous drain current (note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .i d t c = 100 o c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .i d 8 5 a a pulsed drain current (note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i dm 32 a gate to source voltage (note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .v gs 20 v continuous source current (body diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i s 8a pulse source current (body diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i sm 32 a maximum power dissipation (figure 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . p d 25 w linear derating factor (figure 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.20 w/ o c operating and storage temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . t j, t stg -55 to 150 o c maximum temperature for soldering leads at 0.063in (1.6mm) from case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . t l package body for 10s, see techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .t pkg 300 260 o c o c caution: stresses above those listed in ?bsolute maximum ratings may cause permanent damage to the device. this is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this speci?ation is not implied. note: 1. t j = 25 o c to 125 o c. electrical speci?ations t c = 25 o c, unless otherwise speci?d parameter symbol test conditions min typ max units drain to source breakdown voltage bv dss i d = 0.25ma, v gs = 0v 100 - - v gate threshold voltage v gs(th) v gs = v ds , i d = 0.5ma 2 - 4 v zero gate voltage drain current i dss v ds = 100v, v gs = 0v - - 250 a v ds = 80v, v gs = 0v, t c = 125 o c - - 1000 a on-state drain current (note 2) v ds(on) i d = 8a, v gs = 10v - - 1.56 v gate to source leakage current i gss v gs = 20v - - 100 na drain to source on resistance (note 2) r ds(on) i d = 5a, v gs = 10v - 0.14 0.180 ? i d = 5a, v gs = 10v, t c = 125 o c - - 0.350 ? diode forward voltage (note 2) v sd t c = 25 o c, i s = 8a, v gs = 0v 0.75 - 1.5 v forward transconductance (note 2) g fs v ds = 5v, i d = 5a 3 5.5 9 s turn-on delay time t d(on) v dd ? 30v, i d = 5a, r g = 50 ? (figure 17) mosfet switching times are essentially independent of operating temperature - - 30 ns rise time t r - - 75 ns turn-off delay time t d(off) - - 40 ns fall time t f - - 45 ns input capacitance c iss v ds = 25v, v gs = 0v, f = 1mhz, (figure 11) 350 600 900 pf output capacitance c oss 150 300 500 pf reverse transfer capacitance c rss 50 100 150 pf thermal resistance junction to case r jc --5 o c/w thermal resistance junction to ambient r ja free air operation - - 175 o c/w safe operating area soa v ds = 80v, i d = 310ma 25 - - w v ds = 3.12v, i d = 8a 25 - - w source to drain diode speci?ations parameter symbol test conditions min typ max units reverse recovery time t rr t j = 150 o c, i sd = 8a, di sd /dt = 100a/ s - 300 - ns reverse recovered charge q rr t j = 150 o c, i sd = 8a, di sd /dt = 100a/ s - 1.5 - c notes: 2. pulse test: pulse width 300 s, duty cycle 2%. 3. repetitive rating: pulse width limited by maximum junction temperature. see transient thermal impedance curve (figure 3). 2N6796
?001 fairchild semiconductor corporation 2N6796 rev. b typical performance curves unless otherwise speci?d figure 1. normalized power dissipation vs case temperature figure 2. maximum continuous drain current vs case temperature figure 3. normalized maximum transient thermal impedance figure 4. forward bias safe operating area figure 5. output characteristics t c , case temperature ( o c) power dissipation multiplier 0 0 25 50 75 100 150 0.2 0.4 0.6 0.8 1.0 1.2 125 0 50 100 i d , drain current (a) t c , case temperature ( o c) 150 25 75 125 10 8 6 4 2 t, rectangular pulse duration (s) z jc , normalized thermal impedance 10 -3 10 -2 1.0 10 -5 10 -4 0.01 0.1 10 10 -1 1 p dm notes: duty factor: d = t 1 /t 2 peak t j = p dm x z jc x r jc + t c t 1 t 2 single pulse 0.1 0.02 0.2 0.5 0.01 0.05 v ds , drain to source voltage (v) 10 i d , drain current (a) 100 100 1 10 -1 -0.1 1000 10 s 100 s 1ms 10ms 100ms dc single pulse t j = max rated t c = 25 o c operation in this area is limited by r ds(on) i d , drain current (a) 010203040 5 10 15 20 25 50 10v v ds , drain to source voltage (v) pulse duration = 80 s 0 8v 7v 6v 5v 4v 30 35 9v 2N6796
?001 fairchild semiconductor corporation 2N6796 rev. b figure 6. saturation characteristics figure 7. transfer characteristics note: heating effect of 2 s pulse is minimal. figure 8. drain to source on resistance vs gate voltage and drain current figure 9. normalized drain to source on resistance vs junction temperature figure 10. normalized drain to source breakdown voltage vs junction temperature figure 11. capacitance vs drain to source voltage typical performance curves unless otherwise speci?d (continued) 0 5 0 1 23 5 10 15 i d , drain current (a) v ds , drain to source voltage (v) 20 4 25 pulse duration = 80 s 30 35 7v 4v 5v 6v 8v 9v v gs = 10v 6 15 10 5 0 24 i d , drain current (a) v gs , gate to source voltage (v) 0 25 20 6810 t j = 125 o c t j = 25 o c t j = -55 o c 30 80 s pulse test 35 i d , drain current (a) r ds(on) , on-state resistance ( ? ) 0.4 0.3 0.2 0.1 0 010203040 v gs = 20v v gs = 10v 50 60 0.5 0.6 1.75 1.00 0.75 0.50 0.25 -80 -40 0 40 t j , junction temperature ( o c) 80 120 160 1.25 1.50 normalized on-resistance 2.00 v gs = 10v i d = 4a 1.10 0.95 0.90 0.85 0.80 -80 -40 0 40 t j , junction temperature ( o c) 80 120 160 1.00 1.05 normalized on-resistance 1.15 2000 400 0 020 50 c, capacitance (pf) 1200 v ds , drain to source voltage (v) 1600 800 c iss c oss c rss 10 30 40 c iss = c gs + c gd c rss = c gd c oss c ds + c gd v gs = 0v, f = 1mhz 2N6796
?001 fairchild semiconductor corporation 2N6796 rev. b figure 12. transconductance vs drain current figure 13. source to drain diode voltage figure 14. gate to source voltage vs gate charge typical performance curves unless otherwise speci?d (continued) 6 4 2 0 510 i d , drain current (a) 0 10 8 15 20 25 g fs , transconductance (s) 80 s pulse test t j = 125 o c t j = -55 o c t j = 25 o c 30 35 0 2 10 5 2 1 v sd , source to drain voltage (v) i sd , source to drain current (a) t j = 150 o c t j = 25 o c 5 0.5 1.0 1.5 2.0 2.5 3.0 15 10 5 0 8 16 24 32 v ds = 20v v ds = 50v v ds = 80v q g , total gate charge (nc) v gs , gate to source (v) 20 0 i d = 18a 2N6796
?001 fairchild semiconductor corporation 2N6796 rev. b test circuits and waveforms figure 15. unclamped energy test circuit figure 16. unclamped energy waveforms figure 17. switching time test circuit figure 18. resistive switching waveforms figure 19. gate charge test circuit figure 20. gate charge waveforms t p v gs 0.01 ? l i as + - v ds v dd r g dut vary t p to obtain required peak i as 0v v dd v ds bv dss t p i as t av 0 v gs r l r g dut + - v dd t on t d(on) t r 90% 10% v ds 90% 10% t f t d(off) t off 90% 50% 50% 10% pulse width v gs 0 0 0.3 f 12v battery 50k ? v ds s dut d g i g(ref) 0 (isolated v ds 0.2 f current regulator i d current sampling i g current sampling supply) resistor resistor same type as dut q g(tot) q gd q gs v ds 0 v gs v dd i g(ref) 0 2N6796
disclaimer fairchild semiconductor reserves the right to make changes without further notice t o any products herein t o improve reliability , function or design. fairchild does not assume any liability arising out of the applica tion or use of any product or circuit described herein; neither does it convey any license under its p a tent rights, nor the rights of others. trademarks the following are registered and unregistered trademarks fairchild semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. life support policy fairchild?s products are not authorized for use as critical components in life support devices or systems without the express written approval of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. a critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms datasheet identification product status definition advance information preliminary no identification needed obsolete this datasheet contains the design specifications for product development. specifications may change in any manner without notice. this datasheet contains preliminary data, and supplementary data will be published at a later date. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains final specifications. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains specifications on a product that has been discontinued by fairchild semiconductor. the datasheet is printed for reference information only. formative or in design first production full production not in production optologic? optoplanar? pacman? pop? power247? powertrench qfet? qs? qt optoelectronics? quiet series? silent switcher fast fastr? frfet? globaloptoisolator? gto? hisec? isoplanar? littlefet? microfet? micropak? microwire? rev. h4 a acex? bottomless? coolfet? crossvolt ? densetrench? dome? ecospark? e 2 cmos tm ensigna tm fact? fact quiet series? smart start? star*power? stealth? supersot?-3 supersot?-6 supersot?-8 syncfet? tinylogic? trutranslation? uhc? ultrafet a a a star*power is used under license vcx?
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